Start address must be aligned

Start address must be aligned

I am new to Embedding programing and debugging an issue realted to write
to an fpga register. fpga registers are mapped to cpld device . Fpga
resgiter write failed at very start of the code
//Start address must be aligned
if(ad & 0x3)
{
syslog(LOG_ERR, "%s, fpga reg address is not aligned\n", c__);
return FAILURE;
}
Now write is failing saying that fpga reg address is not aligned
The value of ad we are passing here is 1 .
We don't have FPGA resiter specs with us but one of .def files gives cpld
resgiter list
* 0x20 */
REG(fc)
REGR(pp)
REG(pq)
REGR(inq)
I believe pp ,pq and inq is one of the fpga register(mapped to cpld) we
are writing to and 0x20 is address of fc resgister
So are we passing wrong address(ad) for writing to fpga resgiter??
What I can make out of
Start address must be aligned.